Big-PERCIVAL: Exploring the Native Use of 64-Bit Posit Arithmetic in Scientific Computing

The accuracy requirements in many scientific computing workloads result in the use of double-precision floating-point arithmetic in the execution kernels. Nevertheless, emerging real-number representations, such as posit arithmetic, show promise in delivering even higher accuracy in such computations. In this work, we explore the native use of 64-bit posits in a series of numerical benchmarks extracted from the PolyBench collection and compare their timing performance, accuracy and hardware cost to IEEE 754 doubles. For this, we extend the PERCIVAL RISC-V core and the Xposit custom RISC-V extension with posit64 and quire operations. Results show that posit64 can execute as fast as doubles, while also obtaining up to 4 orders of magnitude lower mean square error and up to 3 orders of magnitude lower maximum absolute error. However, leveraging the quire accumulator register can limit the order of some operations such as matrix multiplications. Furthermore, detailed FPGA synthesis results highlight the significant hardware cost of 64-bit posit arithmetic and quire. Despite this, the large accuracy improvements achieved with the same memory bandwidth suggest that posit arithmetic may provide a potential alternative representation for scientific computing.

D. Mallasén, A. A. Del Barrio, and M. Prieto-Matias, “Big-PERCIVAL: Exploring the Native Use of 64-Bit Posit Arithmetic in Scientific Computing.” arXiv, May 11, 2023. [Online]. Available:
    title = {Big-{{PERCIVAL}}: {{Exploring}} the {{Native Use}} of 64-{{Bit Posit Arithmetic}} in {{Scientific Computing}}},
    shorttitle = {Big-{{PERCIVAL}}},
    author = {Mallas{\'e}n, David and Del Barrio, Alberto A. and {Prieto-Matias}, Manuel},
    year = {2023},
    month = may,
    number = {arXiv:2305.06946},
    eprint = {2305.06946},
    primaryclass = {cs},
    publisher = {{arXiv}},
    urldate = {2023-05-15},
    archiveprefix = {arxiv},
    langid = {english}