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A list of all the posts and pages found on the site. For you robots out there is an XML version available for digesting as well.
Pages
About me
About me
Posts
publications
LiveChess2FEN: a Framework for Classifying Chess Pieces based on CNNs
D. Mallasén Quintana, A. A. Del Barrio García, and M. Prieto Matías, “LiveChess2FEN: a Framework for Classifying Chess Pieces based on CNNs,” arXiv:2012.06858 [cs], Dec. 2020. [Online]. Available: http://arxiv.org/abs/2012.06858BibTeX
@article{mallasenquintana2020LiveChess2FEN,
title = {{{LiveChess2FEN}}: A {{Framework}} for {{Classifying Chess Pieces}} Based on {{CNNs}}},
shorttitle = {{{LiveChess2FEN}}},
author = {Mallas{\'e}n Quintana, David and Del Barrio Garc{\'i}a, Alberto Antonio and Prieto Mat{\'i}as, Manuel},
year = {2020},
month = dec,
journal = {arXiv:2012.06858 [cs]},
eprint = {2012.06858},
eprinttype = {arxiv},
primaryclass = {cs},
archiveprefix = {arXiv}
}
Energy-Efficient MAC Units for Fused Posit Arithmetic
R. Murillo, D. Mallasén, A. A. Del Barrio, and G. Botella, “Energy-Efficient MAC Units for Fused Posit Arithmetic,” in 2021 IEEE 39th International Conference on Computer Design (ICCD), Oct. 2021, pp. 138–145. doi: 10.1109/ICCD53106.2021.00032.BibTeX
@inproceedings{murillo2021EnergyEfficient,
title = {Energy-{{Efficient MAC Units}} for {{Fused Posit Arithmetic}}},
booktitle = {2021 {{IEEE}} 39th {{International Conference}} on {{Computer Design}} ({{ICCD}})},
author = {Murillo, Raul and Mallas{\'e}n, David and Del Barrio, Alberto A. and Botella, Guillermo},
year = {2021},
month = oct,
pages = {138--145},
issn = {2576-6996},
doi = {10.1109/ICCD53106.2021.00032}
}
Comparing Different Decodings for Posit Arithmetic
R. Murillo, D. Mallasén, A. A. Del Barrio, and G. Botella, “Comparing Different Decodings for Posit Arithmetic,” in Next Generation Arithmetic, vol. 13253, J. Gustafson and V. Dimitrov, Eds. Cham: Springer International Publishing, 2022, pp. 84–99. doi: 10.1007/978-3-031-09779-9_6.BibTeX
@incollection{murillo2022Comparing,
title = {Comparing {{Different Decodings}} for {{Posit Arithmetic}}},
booktitle = {Next {{Generation Arithmetic}}},
author = {Murillo, Raul and Mallas{\'e}n, David and Del Barrio, Alberto A. and Botella, Guillermo},
editor = {Gustafson, John and Dimitrov, Vassil},
year = {2022},
volume = {13253},
pages = {84--99},
publisher = {{Springer International Publishing}},
address = {{Cham}},
doi = {10.1007/978-3-031-09779-9_6},
isbn = {978-3-031-09778-2 978-3-031-09779-9},
langid = {english}
}
PERCIVAL: Open-Source Posit RISC-V Core with Quire Capability
D. Mallasén, R. Murillo, A. A. D. Barrio, G. Botella, L. Piñuel, and M. Prieto-Matias, “PERCIVAL: Open-Source Posit RISC-V Core With Quire Capability,” IEEE Transactions on Emerging Topics in Computing, vol. 10, no. 3, pp. 1241–1252, 2022, doi: 10.1109/TETC.2022.3187199.BibTeX
@article{mallasen2022PERCIVAL,
title = {{{PERCIVAL}}: {{Open-Source Posit RISC-V Core With Quire Capability}}},
shorttitle = {{{PERCIVAL}}},
author = {Mallas{\'e}n, David and Murillo, Raul and Barrio, Alberto A. Del and Botella, Guillermo and Pi{\~n}uel, Luis and {Prieto-Matias}, Manuel},
year = {2022},
journal = {IEEE Transactions on Emerging Topics in Computing},
volume = {10},
number = {3},
pages = {1241--1252},
issn = {2168-6750},
doi = {10.1109/TETC.2022.3187199}
}
Customizing the CVA6 RISC-V Core to Integrate Posit and Quire Instructions
D. Mallasén, R. Murillo, A. A. Del Barrio, G. Botella, L. Piñuel, and M. Prieto–Matias, “Customizing the CVA6 RISC-V Core to Integrate Posit and Quire Instructions,” in 2022 37th Conference on Design of Circuits and Integrated Circuits (DCIS), Nov. 2022, pp. 01–06. doi: 10.1109/DCIS55711.2022.9970026.BibTeX
@inproceedings{mallasen2022Customizing,
title = {Customizing the {{CVA6 RISC-V Core}} to {{Integrate Posit}} and {{Quire Instructions}}},
booktitle = {2022 37th {{Conference}} on {{Design}} of {{Circuits}} and {{Integrated Circuits}} ({{DCIS}})},
author = {Mallas{\'e}n, David and Murillo, Raul and Del Barrio, Alberto A. and Botella, Guillermo and Pi{\~n}uel, Luis and {Prieto-Matias}, Manuel},
year = {2022},
month = nov,
pages = {01--06},
issn = {2640-5563},
doi = {10.1109/DCIS55711.2022.9970026}
}
PLAUs: Posit logarithmic approximate units to implement low-cost operations with real numbers
R. Murillo, D. Mallasén, A. A. Del Barrio, and G. Botella, “PLAUs: Posit logarithmic approximate units to implement low-cost operations with real numbers,” in Next generation arithmetic, J. Gustafson, S. H. Leong, and M. Michalewicz, Eds., Cham: Springer Nature Switzerland, 2023, pp. 171–188.BibTeX
@inproceedings{murillo2023PLAUs,
title = {{{PLAUs}}: {{Posit}} Logarithmic Approximate Units to Implement Low-Cost Operations with Real Numbers},
booktitle = {Next Generation Arithmetic},
author = {Murillo, Raul and Mallas{\'e}n, David and Del Barrio, Alberto A. and Botella, Guillermo},
editor = {Gustafson, John and Leong, Siew Hoon and Michalewicz, Marek},
year = {2023},
pages = {171--188},
publisher = {{Springer Nature Switzerland}},
address = {{Cham}},
isbn = {978-3-031-32180-1}
}
Big-PERCIVAL: Exploring the Native Use of 64-Bit Posit Arithmetic in Scientific Computing
D. Mallasén, A. A. D. Barrio, and M. Prieto-Matias, “Big-PERCIVAL: Exploring the Native Use of 64-Bit Posit Arithmetic in Scientific Computing,” IEEE Transactions on Computers, vol. 73, no. 6, pp. 1472–1485, Jun. 2024, doi: 10.1109/TC.2024.3377890BibTeX
@article{mallasen2024BigPERCIVAL,
title = {Big-{{PERCIVAL}}: {{Exploring}} the {{Native Use}} of 64-{{Bit Posit Arithmetic}} in {{Scientific Computing}}},
shorttitle = {Big-{{PERCIVAL}}},
author = {Mallas{\'e}n, David and Barrio, Alberto A. Del and {Prieto-Matias}, Manuel},
year = {2024},
journal = {IEEE Transactions on Computers},
volume = {73},
number = {6},
pages = {1472--1485},
issn = {0018-9340, 1557-9956, 2326-3814},
doi = {10.1109/TC.2024.3377890},
langid = {english}
}
talks
[Presentation] PERCIVAL: Open-Source Posit RISC-V Core with Quire Capability
I presented the “PERCIVAL: Open-Source Posit RISC-V Core with Quire Capability” paper at the 29th IEEE Symposium on Computer Arithmetic (ARITH 2022).
[Interview] PERCIVAL - The computer that will boost computing power using a different binary code
I was interviewed on The Tower YouTube channel by Antonio Flores and we talked about posit arithmetic, the PERCIVAL posit RISC-V core and the impact they could have in the future.
[Presentation] PERCIVAL: Integrating Posit and Quire Arithmetic into the RISC-V Ecosystem
I gave a technical talk on “PERCIVAL: Integrating Posit and Quire Arithmetic into the RISC-V Ecosystem” at the RISC-V Summit Europe 2023. This event followed a single-track format and had over 500 attendees. Only <20% of the proposals were accepted for presentation.
teaching
Teaching experience 1
Undergraduate course, University 1, Department, 2014
This is a description of a teaching experience. You can use markdown like any other post.
Teaching experience 2
Workshop, University 1, Department, 2015
This is a description of a teaching experience. You can use markdown like any other post.